Compute Express Link
Compute Express Link (CXL) is an open standard interconnection for high-speed central processing unit (CPU)-to-device and CPU-to-memory, designed to accelerate next-generation data center performance. CXL is built on the PCI Express (PCIe) physical and electrical interface with protocols in three key areas: input/output (I/O), memory, and cache coherence. On April 2, 2020, the Compute Express Link and Gen-Z Consortiums announced their execution of a memorandum of understanding (MoU), describing a mutual plan for collaboration between the two organizations.
Link from a Wikipage to another Wikipage
primaryTopic
Compute Express Link
Compute Express Link (CXL) is an open standard interconnection for high-speed central processing unit (CPU)-to-device and CPU-to-memory, designed to accelerate next-generation data center performance. CXL is built on the PCI Express (PCIe) physical and electrical interface with protocols in three key areas: input/output (I/O), memory, and cache coherence. On April 2, 2020, the Compute Express Link and Gen-Z Consortiums announced their execution of a memorandum of understanding (MoU), describing a mutual plan for collaboration between the two organizations.
has abstract
Compute Express Link (CXL) is ...... between the two organizations.
@en
Link from a Wikipage to an external page
Wikipage page ID
61.476.522
page length (characters) of wiki page
Wikipage revision ID
1.022.680.030
Link from a Wikipage to another Wikipage
name
Compute Express Link
@en
speed
Full duplex
@en
wikiPageUsesTemplate
subject
comment
Compute Express Link (CXL) is ...... between the two organizations.
@en
label
Compute Express Link
@en