Quad Data Rate (QDR) SRAM is a type of static RAM computer memory that can transfer up to four words of data in each clock cycle. Like Double Data-Rate (DDR) SDRAM, QDR SRAM transfers data on both rising and falling edges of the clock signal. The main purpose of this capability is to enable reads and writes to occur at high clock frequencies without the loss of bandwidth due to bus-turnaround cycles incurred in DDR SRAM. QDR SRAM uses two clocks, one for read data and one for write data and has separate read and write data buses (also known as Separate I/O), whereas DDR SRAM uses a single clock and has a single common data bus used for both reads and writes (also known as Common I/O). This helps to eliminate problems caused by the propagation delay of the clock wiring, and allows the illus