RH-32
The RH-32 was a radiation-hardened 32-bit MIPS R3000 based microprocessor chipset developed by the USAF Rome Laboratories for the Ballistic Missile Defense Agency, and produced by Honeywell (later, TRW) for Aerospace applications. It achieves a throughput of 20 MIPS. It was a three-chip set, consisting of Central Processing Unit, Floating Point Unit, and Cache Memory.
Wikipage redirect
Link from a Wikipage to another Wikipage
primaryTopic
RH-32
The RH-32 was a radiation-hardened 32-bit MIPS R3000 based microprocessor chipset developed by the USAF Rome Laboratories for the Ballistic Missile Defense Agency, and produced by Honeywell (later, TRW) for Aerospace applications. It achieves a throughput of 20 MIPS. It was a three-chip set, consisting of Central Processing Unit, Floating Point Unit, and Cache Memory.
has abstract
RH-32は、アメリカ空軍によって弾道ミサイル防衛機構のため ...... 、FPUとキャッシュメモリの3個のチップセットで構成される。
@ja
The RH-32 was a radiation-hard ...... Point Unit, and Cache Memory.
@en
Wikipage page ID
31,549,104
page length (characters) of wiki page
Wikipage revision ID
980,386,513
Link from a Wikipage to another Wikipage
wikiPageUsesTemplate
hypernym
comment
RH-32は、アメリカ空軍によって弾道ミサイル防衛機構のため ...... 、FPUとキャッシュメモリの3個のチップセットで構成される。
@ja
The RH-32 was a radiation-hard ...... Point Unit, and Cache Memory.
@en
label
RH-32
@en
RH-32
@ja