Substrate engineering by hexagonal boron nitride/SiO2 for hysteresis-free graphene FETs and large-scale graphene p-n junctions.
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Substrate engineering by hexagonal boron nitride/SiO2 for hysteresis-free graphene FETs and large-scale graphene p-n junctions.
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2013 nî lūn-bûn
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2013 թուականի Յուլիսին հրատարակուած գիտական յօդուած
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2013 թվականի հուլիսին հրատարակված գիտական հոդված
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2013年の論文
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2013年学术文章
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2013年学术文章
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2013年学术文章
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2013年学术文章
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2013年学术文章
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2013年學術文章
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Substrate engineering by hexag ...... -scale graphene p-n junctions.
@ast
Substrate engineering by hexag ...... -scale graphene p-n junctions.
@en
Substrate engineering by hexag ...... -scale graphene p-n junctions.
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Substrate engineering by hexag ...... -scale graphene p-n junctions.
@ast
Substrate engineering by hexag ...... -scale graphene p-n junctions.
@en
Substrate engineering by hexag ...... -scale graphene p-n junctions.
@nl
prefLabel
Substrate engineering by hexag ...... -scale graphene p-n junctions.
@ast
Substrate engineering by hexag ...... -scale graphene p-n junctions.
@en
Substrate engineering by hexag ...... -scale graphene p-n junctions.
@nl
P2093
P2860
P356
P1476
Substrate engineering by hexag ...... -scale graphene p-n junctions.
@en
P2093
P2860
P304
P356
10.1002/ASIA.201300505
P577
2013-07-09T00:00:00Z