A suitable FPGA implementation of floating-point matrix inversion based on Gauss-Jordan elimination
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A suitable FPGA implementation of floating-point matrix inversion based on Gauss-Jordan elimination
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wetenschappelijk artikel
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наукова стаття, опублікована у квітні 2011
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A suitable FPGA implementation ...... ed on Gauss-Jordan elimination
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A suitable FPGA implementation ...... ed on Gauss-Jordan elimination
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A suitable FPGA implementation ...... ed on Gauss-Jordan elimination
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A suitable FPGA implementation ...... ed on Gauss-Jordan elimination
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A suitable FPGA implementation ...... ed on Gauss-Jordan elimination
@en
A suitable FPGA implementation ...... ed on Gauss-Jordan elimination
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P2093
P356
P1476
A suitable FPGA implementation ...... ed on Gauss-Jordan elimination
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P2093
Carlos H. Llanos
Janier Arias-Garcia
Ricardo Pezzuol Jacobi
P356
10.1109/SPL.2011.5782659
P577
2011-04-01T00:00:00Z