%D9%85%D8%B5%D9%81%D9%88%D9%81%D8%A9_%D8%A7%D9%84%D8%A8%D9%88%D8%A7%D8%A8%D8%A7%D8%AA_%D8%A7%D9%84%D9%85%D9%86%D8%B7%D9%82%D9%8A%D8%A9_%D8%A7%D9%84%D9%82%D8%A7%D8%A8%D9%84%D8%A9_%D9%84%D9%84%D8%A8%D8%B1%D9%85%D8%AC%D8%A9Field_Programmable_Gate_ArrayFPGA%E0%A6%AB%E0%A6%BF%E0%A6%B2%E0%A7%8D%E0%A6%A1-%E0%A6%AA%E0%A7%8D%E0%A6%B0%E0%A7%8B%E0%A6%97%E0%A7%8D%E0%A6%B0%E0%A6%BE%E0%A6%AE%E0%A7%87%E0%A6%AC%E0%A6%B2_%E0%A6%97%E0%A7%87%E0%A6%87%E0%A6%9F_%E0%A6%85%E0%A7%8D%E0%A6%AF%E0%A6%BE%E0%A6%B0%E0%A7%87Matriu_de_portes_programable_in_situCategory:Field-programmable_gate_arraysProgramovateln%C3%A9_hradlov%C3%A9_poleField-Programmable_Gate_ArrayField_Programmable_Gate_ArrayFPGAField-programmable_gate_arrayAgordebla_Matrico_de_Logikaj_ElementojField-programmable_gate_arrayFPGAAte-matrize_programagarri%D9%85%D8%AF%D8%A7%D8%B1_%D9%85%D8%AC%D8%AA%D9%85%D8%B9_%D8%AF%DB%8C%D8%AC%DB%8C%D8%AA%D8%A7%D9%84_%D8%A8%D8%B1%D9%86%D8%A7%D9%85%D9%87%E2%80%8C%D9%BE%D8%B0%DB%8C%D8%B1FPGAField-programmable_gate_arrayFPGA%E0%A4%8F%E0%A4%AB%E0%A4%AA%E0%A5%80%E0%A4%9C%E0%A5%80%E0%A4%8FField-programmable_gate_arrayFPGAField_Programmable_Gate_ArrayFPGAFPGAFPGA%E0%B4%AB%E0%B5%80%E0%B5%BD%E0%B4%A1%E0%B5%8D-%E0%B4%AA%E0%B5%8D%E0%B4%B0%E0%B5%8B%E0%B4%97%E0%B5%8D%E0%B4%B0%E0%B4%BE%E0%B4%AE%E0%B5%8D%E0%B4%AE%E0%B5%87%E0%B4%AC%E0%B4%BF%E0%B5%BE_%E0%B4%97%E0%B5%87%E0%B4%B1%E0%B5%8D%E0%B4%B1%E0%B5%8D_%E0%B4%85%E0%B4%B1%E0%B5%87Field-programmable_gate_arrayFPGAFPGABezpo%C5%9Brednio_programowalna_macierz_bramekField-programmable_gate_arrayFPGA%D0%9F%D1%80%D0%BE%D0%B3%D1%80%D0%B0%D0%BC%D0%BC%D0%B8%D1%80%D1%83%D0%B5%D0%BC%D0%B0%D1%8F_%D0%BF%D0%BE%D0%BB%D1%8C%D0%B7%D0%BE%D0%B2%D0%B0%D1%82%D0%B5%D0%BB%D0%B5%D0%BC_%D0%B2%D0%B5%D0%BD%D1%82%D0%B8%D0%BB%D1%8C%D0%BD%D0%B0%D1%8F_%D0%BC%D0%B0%D1%82%D1%80%D0%B8%D1%86%D0%B0Field-programmable_gate_arrayField_programmable_gate_arrayFPGAField-programmable_gate_array%E0%B9%80%E0%B8%AD%E0%B8%9F%E0%B8%9E%E0%B8%B5%E0%B8%88%E0%B8%B5%E0%B9%80%E0%B8%ADFPGA
about
sameAs
P527
description
Matrice de blocs logiques programmables de la famille réseaux logiques programmables
@fr
array of logic gates that are reprogrammable
@en
digitaalinen mikropiiri
@fi
integrierter Schaltkreis, in welchen eine logische Schaltung geladen werden kann
@de
matriz de portas lóxicas programables
@gl
чип, перепрограммируемый без потери быстродействия
@ru
プログラミング可能な集積回路
@ja
name
Agordebla Matrico de Logikaj Elementoj
@eo
Ate-matrize programagarri
@eu
FPGA
@bg
FPGA
@ca
FPGA
@el
FPGA
@et
FPGA
@fi
FPGA
@he
FPGA
@id
FPGA
@ja
type
label
Agordebla Matrico de Logikaj Elementoj
@eo
Ate-matrize programagarri
@eu
FPGA
@bg
FPGA
@ca
FPGA
@el
FPGA
@et
FPGA
@fi
FPGA
@he
FPGA
@id
FPGA
@ja
altLabel
AFPGA
@da
Asynchronous FPGA
@da
Asynkron FPGA
@da
FPGA
@ar
FPGA
@cs
FPGA
@da
FPGA
@de
FPGA
@en
FPGA
@es
FPGA
@eu
prefLabel
Agordebla Matrico de Logikaj Elementoj
@eo
Ate-matrize programagarri
@eu
FPGA
@bg
FPGA
@ca
FPGA
@el
FPGA
@et
FPGA
@fi
FPGA
@he
FPGA
@id
FPGA
@ja
P227
P244
P2581
P6366
P646
P227
P2283
P244
sh93009062
P2581
P3417
Field-Programmable-Gate-Arrays-FPGAs
P373
Field-programmable gate arrays
P571
1985-01-01T00:00:00Z