High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures.
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High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures.
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2016 nî lūn-bûn
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2016年の論文
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2016年学术文章
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2016年学术文章
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2016年学术文章
@zh-cn
2016年学术文章
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2016年学术文章
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name
High-Current-Density Vertical- ...... oped Silicon Heterostructures.
@en
High-Current-Density Vertical- ...... oped Silicon Heterostructures.
@nl
type
label
High-Current-Density Vertical- ...... oped Silicon Heterostructures.
@en
High-Current-Density Vertical- ...... oped Silicon Heterostructures.
@nl
prefLabel
High-Current-Density Vertical- ...... oped Silicon Heterostructures.
@en
High-Current-Density Vertical- ...... oped Silicon Heterostructures.
@nl
P2093
P2860
P50
P356
P1433
P1476
High-Current-Density Vertical- ...... Doped Silicon Heterostructures
@en
P2093
Hung-Chieh Cheng
Jiming Sheng
Xiangfeng Duan
P2860
P304
P356
10.1002/ADMA.201506173
P407
P577
2016-04-01T00:00:00Z
P698
P818
1512.08486