Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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наукова стаття, опублікована в липні 2017
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Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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P2093
P1476
Fixed-point arithmetic error analysis of sparse LU decomposition on FPGAs
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P2093
Abdosamad Hamidi
Majid Ahmadi
Mohammad Saeed Feali
P356
10.1109/ISSCS.2017.8034900
P50
P577
2017-07-01T00:00:00Z