A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
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A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
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wetenschappelijk artikel
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наукова стаття, опублікована у 2012
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A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
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A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
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A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
@en
A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
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A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
@en
A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
@nl
P2093
P2860
P356
P1476
A Hardware-Accelerated ECDLP with High-Performance Modular Multiplication
@en
P2093
Lyndon Judge
Patrick Schaumont
Suvarna Mane
P2860
P356
10.1155/2012/439021
P577
2012-01-01T00:00:00Z