Multiple-Clock-Cycle Architecture for the VLSI Design of a System for Time-Frequency Analysis
about
Multiple-Clock-Cycle Architecture for the VLSI Design of a System for Time-Frequency Analysis
description
im März 2006 veröffentlichter wissenschaftlicher Artikel
@de
wetenschappelijk artikel
@nl
наукова стаття, опублікована в березні 2006
@uk
name
Multiple-Clock-Cycle Architect ...... em for Time-Frequency Analysis
@en
Multiple-Clock-Cycle Architect ...... em for Time-Frequency Analysis
@nl
type
label
Multiple-Clock-Cycle Architect ...... em for Time-Frequency Analysis
@en
Multiple-Clock-Cycle Architect ...... em for Time-Frequency Analysis
@nl
prefLabel
Multiple-Clock-Cycle Architect ...... em for Time-Frequency Analysis
@en
Multiple-Clock-Cycle Architect ...... em for Time-Frequency Analysis
@nl
P2093
P2860
P356
P1476
Multiple-Clock-Cycle Architect ...... em for Time-Frequency Analysis
@en
P2093
L Jubivša Stanković
Radovan Stojanović
Veselin N. Ivanović
P2860
P2888
P356
10.1155/ASP/2006/60613
P577
2006-03-12T00:00:00Z
P6179
1063205888