JTAG
JTAG (named after the Joint Test Action Group which codified it) is an industry standard for verifying designs and testing printed circuit boards after manufacture. JTAG implements standards for on-chip instrumentation in electronic design automation (EDA) as a complementary tool to digital simulation. It specifies the use of a dedicated debug port implementing a serial communications interface for low-overhead access without requiring direct external access to the system address and data buses. The interface connects to an on-chip Test Access Port (TAP) that implements a stateful protocol to access a set of test registers that present chip logic levels and device capabilities of various parts.
1149.1ARM11ARM7ARM9ARM Cortex-AARM Cortex-A12ARM Cortex-A15ARM Cortex-A5ARM Cortex-A7ARM Cortex-A8ARM Cortex-A9ARM Cortex-MARM Cortex-RARM architectureAVR32AVR ButterflyAVR microcontrollersAccelerated Graphics PortAmigaOne X1000Atmel ARM-based processorsAutomated X-ray inspectionAutomated optical inspectionAutomatic test pattern generationBackground debug mode interfaceBall grid arrayBeagleBoardBootingBoundary scanBoundary scan description languageBuilt-in self-testBus PirateBus analyzerCJTAGCalao SystemsChibiOS/RTCode Composer StudioCommon Firmware EnvironmentComparison of 802.15.4 radio modulesComputer engineering compendiumCoreboot
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JTAG
JTAG (named after the Joint Test Action Group which codified it) is an industry standard for verifying designs and testing printed circuit boards after manufacture. JTAG implements standards for on-chip instrumentation in electronic design automation (EDA) as a complementary tool to digital simulation. It specifies the use of a dedicated debug port implementing a serial communications interface for low-overhead access without requiring direct external access to the system address and data buses. The interface connects to an on-chip Test Access Port (TAP) that implements a stateful protocol to access a set of test registers that present chip logic levels and device capabilities of various parts.
has abstract
De Joint Test Action Group of ...... orden en -chips aan te pakken.
@nl
En electrónica, JTAG, acrónimo ...... o y de lógica en sus sistemas.
@es
JTAG (named after the Joint Te ...... vide vendor-specific features.
@en
JTAG (скорочення від англ. Joi ...... n Description Language (BSDL).
@uk
JTAG (сокращение от англ. Join ...... правление выводами микросхемы.
@ru
JTAG és un acrònim de Joint Te ...... ues úniques de cada fabricant.
@ca
JTAG(Joint Test Action Group)은 ...... 치에서 멈추고 상태를 읽어 내부의 상태를 알 수 있다.
@ko
JTAG, acronimo di Joint Test A ...... ità in modo parziale o totale.
@it
JTAG是联合测试工作组(Joint Test Action ...... 的偵錯模組。偵錯模組可以讓程式設計師偵錯嵌入式系統中的軟體。
@zh
JTAG(ジェイタグ、英語: Joint Test Acti ...... JETAGであったがEuropeanが抜けJTAGとなった。
@ja
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De Joint Test Action Group of ...... orden en -chips aan te pakken.
@nl
En electrónica, JTAG, acrónimo ...... ary-scan y JTAG son sinónimos.
@es
JTAG (named after the Joint Te ...... capabilities of various parts.
@en
JTAG (скорочення від англ. Joi ...... ури тестування і налагодження.
@uk
JTAG (сокращение от англ. Join ...... нальное назначение этих линий:
@ru
JTAG és un acrònim de Joint Te ...... près un cop ja s'han fabricat.
@ca
JTAG(Joint Test Action Group)은 ...... 치에서 멈추고 상태를 읽어 내부의 상태를 알 수 있다.
@ko
JTAG, acronimo di Joint Test A ...... mpetitivo il “Time to market”.
@it
JTAG是联合测试工作组(Joint Test Action ...... 的偵錯模組。偵錯模組可以讓程式設計師偵錯嵌入式系統中的軟體。
@zh
JTAG(ジェイタグ、英語: Joint Test Acti ...... JETAGであったがEuropeanが抜けJTAGとなった。
@ja
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JTAG
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JTAG
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JTAG
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JTAG
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JTAG
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JTAG
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JTAG
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JTAG
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JTAG
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JTAG
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