Low operating bias and matched input-output characteristics in graphene logic inverters.
about
Integrated digital inverters based on two-dimensional anisotropic ReS2 field-effect transistors.Origin of the relatively low transport mobility of graphene grown through chemical vapor depositionGraphene: nanoscale processing and recent applications.Nanoelectronic circuits based on two-dimensional atomic layer crystals.Charge transport and mobility engineering in two-dimensional transition metal chalcogenide semiconductors.Barrier inhomogeneities at vertically stacked graphene-based heterostructures.Carrier sheet density constrained anomalous current saturation of graphene field effect transistors: kinks and negative differential resistances.Fully inkjet-printed two-dimensional material field-effect heterojunctions for wearable and textile electronics.Graphene-Based Flexible and Stretchable Electronics.Superlattice assembly of graphene oxide (GO) and titania nanosheets: fabrication, in situ photocatalytic reduction of GO and highly improved carrier transport.Chemically induced Fermi level pinning effects of high-k dielectrics on graphene.Highly air stable passivation of graphene based field effect devicesSuppression of thermally activated carrier transport in atomically thin MoS2 on crystalline hexagonal boron nitride substrates
P2860
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P2860
Low operating bias and matched input-output characteristics in graphene logic inverters.
description
2010 nî lūn-bûn
@nan
2010年の論文
@ja
2010年論文
@yue
2010年論文
@zh-hant
2010年論文
@zh-hk
2010年論文
@zh-mo
2010年論文
@zh-tw
2010年论文
@wuu
2010年论文
@zh
2010年论文
@zh-cn
name
Low operating bias and matched input-output characteristics in graphene logic inverters.
@en
Low operating bias and matched input-output characteristics in graphene logic inverters.
@nl
type
label
Low operating bias and matched input-output characteristics in graphene logic inverters.
@en
Low operating bias and matched input-output characteristics in graphene logic inverters.
@nl
prefLabel
Low operating bias and matched input-output characteristics in graphene logic inverters.
@en
Low operating bias and matched input-output characteristics in graphene logic inverters.
@nl
P2093
P356
P1433
P1476
Low operating bias and matched input-output characteristics in graphene logic inverters
@en
P2093
Akichika Kumatani
Akinobu Kanda
Hisao Miyazaki
P304
P356
10.1021/NL100031X
P407
P577
2010-07-01T00:00:00Z